> Btw, if someone understands how ECC RAM works with only one extra bit
> per byte could you send me (not the list) email? Where's the magic?
It's kinda awkward to explain but I will try my best.
It is easier to visualize the ECC scheme if you distribute the
check bits among the data words.
So an 8-bit word requires 4 check bits.
bit check data
12 8
11 7
10 6
9 5
8 4
7 4
6 3
5 2
4 3
3 1
2 2
1 1
Each check bit is responsible for checking the correctness of
its particular column.
So check bit 1 would check all bits whose binary number contains
a one in the 2^0 position, bit 2 a one in the 2^1 position and
so on.
Here is the logic to calculate the check bits.
c1 = d1 xor d2 xor d4 xor d5 xor d7
c2 = d1 xor d3 xor d4 xor d6 xor d7
c3 = d2 xor d3 xor d4 xor d8
c4 = d5 xor d6 xor d7 xor d8
the check bits are then stored with the memory word. When
reading the word from memory the check bit are recalculated.
then the stored check bits and the new check bits are xor'd.
errorpos = storedcheck xor newcheck
if errorpos is 0 no error has occured. If it is non zero it
indicates the bit position that contains the error(1-12).
This is know as a Single error Detection/Single error correcting
code(SED-SEC)
What you are referring to in your note is a
Double Error Detection/Single Error Correcting code(DED-SEC). It
requires one more check bit than SED-SEC. Since the number of
check bits grows as a log of 2 the check bit overhead decreases
as the word size increases. For a machine that has a 64-bit
memory word SED-SEC requires 7 bits and DED-SEC requires 8 bits.
That's where the 1 bit per byte comes from.
The formula to calculate the number of check bits required is
2^C - 1 >= M + C
Where C is the number of check bits and M is the number of data
bits.
Just for comparison 128 bits requires only 8 and 9 bits of check.
Justin Bandholz
Virginia Tech
bandholz@vt.edu