Re: DES in hardware

Trent Piepho (
Thu, 19 Jun 1997 18:57:12 -0700 (PDT)

On Thu, 19 Jun 1997, Logic wrote:
> If you're never seen these figures, they're a bit alarming (or
> exhilirating, depending on your goals ;)) Check it out if you
> have the time and interest.

I think their estimates for a custom ASIC are a little high.

>From MOSIS's price list, a 0.5 micron process is $670 per sq mm, for 25 chips,
and $500 for additional quantities of 25. So each chip is $456 for the first
25 and $340 there after. This is a lot more than $10.50 per chip used
elsewhere, but that price would need a dedicated run and very large quantities
to get.

The chip described by Michael Wiener, scaled to .5um, would be 17 sq mm and
should be able to do 128Mk/sec. His chip used standard cells and could be
made much smaller/faster by using pseudo-nMOS ROM cells instead of CMOS
combinational logic for the S-boxes and dynamic latches for the pipeline
registers instead of flip-flops.

For 64 of these chips it would cost $25k, and the machine could do 8.19
Gkeys/sec. Faster than DESCHALL's highest rate, which seems to be 6.4Gk/sec.
I wonder how 25k compares to the cost of one of those dual ultrasparcs. I
checked Sun's web page but they seem to want you to _pay money_ to find out
how much a workstation lists for!? From the stats page, it seems DESCHALL
checked 24% of the keyspace in 97 days. This machine could do that in 25

|Gazing up to the breeze of the heavens \ on a quest, meaning, reason |
|came to be, how it begun \ all alone in the family of the sun |
|curiosity teasing everyone \ on our home, third stone from the sun. |
|Trent Piepho ( -- Metallica |